Programmable at the core
A GPU-class architecture designed to support evolving workloads—not a fixed-function endpoint.
PROGRAMMABLE COMPUTE ARCHITECTURE
One architecture.
Every layer.
Our GPU architecture, codenamed DIRAC, is the foundation for a new class of accelerator infrastructure—programmable, memory-led, and engineered as one system from software to silicon.
NowLive Voice + Chat experiences
NextScaling through applications, systems and purpose-built silicon
01 / THE IDEA
The GPU became the engine of modern computing. We are rethinking that engine.
Every engineering step—from deterministic execution and memory locality to live Voice and Chat—is part of a larger platform. DIRAC connects interactive applications with a programmable architecture designed to scale through systems and future purpose-built silicon.
02 / TECHNOLOGY
Built as a complete
compute system.
WORKLOADS
AIGraphicsScienceData
SOFTWARE
Models + ApplicationsTools, compilers, runtime and orchestration
DIRAC
Programmable Compute IPDeterministic execution, data movement and memory locality
SYSTEM
Application → Runtime → System → SiliconOne architecture expressed at every layer
Memory-led by design
Compute, HBM and data movement are designed together so the whole system can do useful work.
Exact before expansive
We qualify deterministic dense execution first, creating a trustworthy base for broader capabilities.
03 / DIFFERENCE
Architecture is not a component.
It is the whole path.
Hardware and software, together
The runtime, workload mapping, compute engines, memory paths and physical implementation evolve as one design.
Proof over promises
Exact outputs, deterministic semantics and physical qualification come before performance claims.
A platform, not a point product
The same architectural foundation connects live applications to larger systems and future purpose-built silicon.
04 / APPLICATION SPACES
One architecture.
Eight application spaces.
Applications describe where DIRAC could create value. Product offerings describe the hardware forms that could deliver it. The two layers are related, but deliberately separate.
Training + inference
Foundation models, fine-tuning, recommendation, search, vision and generative AI.
Initial focusPersonal AI + creation
Interactive assistants, voice, media workflows and accelerated applications for personal systems.
First applicationsGaming + graphics
Real-time rendering, game engines, virtual production, visualization and immersive experiences.
RoadmapCloud + AI infrastructure
Accelerated services, analytics, databases and high-throughput compute at infrastructure scale.
Future platformHPC + scientific computing
Simulation, numerical methods, engineering analysis, research and scientific discovery.
RoadmapIndustrial + robotics
Machine vision, control, autonomy and responsive compute for factories and field systems.
RoadmapAutomotive + mobility
Onboard perception, sensor processing and future vehicle-compute platforms.
RoadmapSpace + aerospace
Onboard sensing, data reduction, communications and autonomous compute for future flight and space systems.
Roadmap05 / PRODUCT OFFERINGS
From accelerator
to complete system.
Eleven product-form concepts grouped by what they are: silicon, accelerator modules, and complete systems. Application markets remain a separate layer.
A signature in platinum.
Bright brushed platinum finishes, polished edges and precision ventilation give the family a common identity. Graphite structures add depth; restrained teal accents mark the details.
01 / SILICON
The architecture in silicon.
DIRAC accelerator silicon shown as a conceptual lidless package layout—not a finalized floorplan, package specification, or tape-out announcement.
DIRAC SiliconFUTURE SILICON CONCEPT
Conceptual 2.5D package with an exposed accelerator die, eight low-profile HBM packages and an engraved diamond-M mark.
02 / ACCELERATORS + MODULES
Deploy the silicon.
Standard accelerator forms and specialized roadmap modules for distinct integration and qualification paths.
PCIe AcceleratorCONCEPT
Add-in accelerator concept for compatible host systems.
OAM ModuleCONCEPT
Serviceable modular accelerator concept for dense systems.
Automotive Compute ModuleROADMAP CONCEPT
Future vehicle-compute form factor; no automotive qualification or functional-safety claim.
Space Compute ModuleROADMAP CONCEPT
Future onboard compute for spacecraft inference and data reduction; no flight or radiation qualification claim.
03 / SYSTEMS + INFRASTRUCTURE
Scale from desk to cluster.
Independent system concepts that can be composed, rearranged and developed without conflating them with application markets.
DesktopCONCEPT
Compact local system for application development and experimentation.
WorkstationCONCEPT
Expandable professional tower with a smoked-glass side panel.
Edge ControllerCONCEPT
Mountable industrial system for sensor, network and control integration.
OAM ServerCONCEPT
Double-height, eight-accelerator compute-node concept with dense serviceable cooling and front NVMe storage.
RackCONCEPT
Cabinet-scale system integrating compute, service access and cooling.
ClusterCONCEPT
Scale-out infrastructure concept joining compute, networking and cooling.
THE FOUNDATION / DIRAC
DIRAC is the shared architectural foundation across software, systems and future purpose-built silicon. These form studies explore how the platform could take shape across products and applications.
06 / THE GREATER PUZZLE
Build the product.
Build the system.
Build the future.
Today's engineering is the first layer of a much larger strategy: a sovereign, programmable accelerated-computing platform created in the UAE and built for global scale.
- NOWDeterministic dense executionExact behavior validated end to end
- NEXTApplications and systemsVoice, Chat, resident decoding and server integration
- SCALEMemory and rack architectureEfficient traffic, deployment and scale-out
- FUTUREPurpose-built siliconThe DIRAC architecture in chip form
07 / EXPERIENCE + BUILD